1. Field of the Invention
The present invention relates to a thin film transistor for a liquid crystal display and a method for manufacturing the same, and more particularly, to a thin film transistor for a liquid crystal display and a method for manufacturing the same capable of decreasing the number of required photomasks.
2. Description of the Related Art
In an information-oriented society these days, the role of electronic displays is becoming increasingly important. The electronic displays of all kinds are widely used in various industrial fields.
Generally, the electronic display is an apparatus for visually transmitting a variety of information to a person. That is, an electrical information signal output from various electronic devices is converted into a visually recognizable optical information signal presented on electronic displays. Therefore, the electronic display serves as a bridge for connecting the person and the electronic devices.
The electronic display is classified into an emissive display, in which the optical information signal is displayed by a light-emitting method, and a non-emissive display, in which the optical information signal is displayed by an optical modulation method, including light-reflecting, dispersing and interfering phenomena. Examples of the emissive display, referred to as an active display, include a CRT (Cathode Ray Tube), a PDP (Plasma Display Panel), an LED (Light Emitting Diode) and an ELD (Electroluminescent Display). Examples of the non-emissive display referred to as a passive display, include an LCD (Liquid Crystal Display), an ECD (Electrochemical Display) and an EPID (Electrophoretic Image Display).
The CRT used in an image display such as a television receiver or a monitor, has the highest market share to date with respect to display quality and economical efficiency, but the CRT also has many disadvantages such as heavy weight, large volume and high power consumption.
Meanwhile, due to rapid development of a semiconductor technology, various kinds of electronic devices are now driven by lower voltage and lower power, which produces electronic equipment that is considerably slimmer and lighter. Therefore, a flat panel type display having these slimmer and lighter characteristics, as well as lower driving voltage and lower power consumption characteristics, is very desirable according to the new environment.
The LCD among the various developed flat panel type displays is much slimmer and lighter than any other displays; LCDs also have low driving voltage and low power consumption, as well as displaying quality similar to that of the CRT. Therefore, the LCD is widely used in various electronic equipment.
The LCD comprises two substrates respectively having an electrode, and a liquid crystal layer interposed between the two substrates. In the LCD, a voltage is applied to the electrode to re-align liquid crystal molecules and to control an amount of light transmitted through the molecules. These LCDs are classified into a transmission type LCD, for displaying an image using an external light source, and a reflection type LCD, for displaying an image using natural light.
One of the LCDs, which is mainly used nowadays, is provided with the electrode formed at each of the two substrates and having a thin film transistor for switching power supplied to each electrode. Generally, the thin film transistor (referred to as TFT, hereinafter) is formed at one side of the two substrates.
Generally, a substrate on which TFTs are formed is referred to as a xe2x80x9cTFT substrate.xe2x80x9d And, such a TFT substrate is generally manufactured by a photolithography process using a photomask; currently, for example, seven sheets of photomasks are required at the present.
FIG. 1 is a sectional view of a conventional reflection type TFT LCD.
Referring to FIG. 1, after depositing a single layered metallic film or a double layered metallic film such as chromium (Cr), aluminum (Al), molybdenum (Mo) or an alloy of Mo and tungsten (W) as a gate film on a transparent substrate 10 made of glass, quartz, or sapphire, the gate film is patterned using a photolithography process to form a gate wiring (using a first mask). The gate wiring includes a gate electrode 12, a gate line connected to the gate electrode 12 and a gate pad 13 that receives a signal from the outside and transmits the received signal to the gate line.
A gate insulating film 14 made of silicon nitride is formed to a thickness of about 4,500 xc3x85 on the substrate on which the gate wiring is formed. A semiconductor film made of amorphous silicon is deposited on the gate insulating film 14 and then patterned to form an active pattern 16 of a TFT (using a second mask).
A metal film is deposited on the active pattern 16 and the gate insulating film 14 and then is patterned using the photolithography process to form a data wiring (using a third mask). The data wiring includes a source electrode 18, a drain electrode 19 and a data pad (not shown) for transmitting an image signal.
After depositing an inorganic passivation film 20 made of silicon nitride on the data wiring and the gate insulating film 14 to a thickness of about 4,000 xc3x85, the inorganic passivation film 20 and the gate insulating film 14 on the source electrode, gate wiring and data pad are dry-etched by the photolithography process (using a fourth mask).
A photosensitive organic passivation film 22 is deposited to a thickness range of about 2-4 xcexcm on the inorganic passivation film 20 and is then exposed using a photomask (using a fifth mask). At this time, the organic passivation film 22 placed on the source electrode 18, gate wiring and data pad is fully exposed.
In addition, to make the reflection plate of the pixel region in a light scattering structure, the organic passivation film 22 is again exposed (using a sixth mask). At this time, the organic passivation film 22 of the display region is incompletely exposed in an irregular pattern having a line width corresponding to the resolution of an exposing machine.
Subsequently, the exposed organic passivation film 22 is developed to form an irregular surface having a plurality of concave portions and convex portions in the organic passivation film 22 and a first via hole for exposing the source electrode 18 and a second via hole for exposing the gate pad 13. In addition, although not shown in the drawings, there is formed a third via hole for exposing the data pad together.
On the organic passivation film 22, in which the aforementioned via holes are formed, a reflection metal film such as aluminum (Al) is deposited and then patterned to form a pixel electrode 26, which is connected to the source electrode 18 through the first via hole, and a gate pad electrode 27, which is connected to the gate pad 13 through the second via hole (using a seventh mask). In addition, there is formed a data pad electrode (not shown), which is connected to the data pad through the third via hole, together. The pixel electrode 26 is formed within the pixel region enclosed by the gate wiring and the data wiring and is provided as a reflection plate.
To manufacture a TFT according to the aforementioned conventional method, the photolithography process is used in the seven layers of the gate wiring, active pattern, data wiring, inorganic passivation film, organic passivation film and pixel electrode and thus at least seven sheets of photomask are needed.
As the number of photomasks used in the photolithography process increases, the more the manufacturing cost and the probability of process error increase. Since this causes an increase in the manufacturing costs, there has been proposed a method for forming the inorganic passivation film as a single layer by deleting the inorganic passivation film in order to simplify the process.
FIGS. 2A to 4B are sectional views for describing a method for forming a via hole in a TFT in accordance with another conventional method in which the inorganic passivation film is deleted. Here, FIGS. 2A, 3A and 4A show a part of the display region and FIGS. 2B, 3B and 4B show a part of the pad region.
Referring to FIGS. 2A and 2B, after depositing an organic passivation film 45, made of a photosensitive material, on a substrate 40 on which a gate wiring 42, made of a first metal film, a gate insulating film 43, made of an inorganic insulating film and a data wiring, made of a second metal film, are formed in the order named, via hole portions 45a and 45b of the organic passivation film 45 are exposed using a photomask 30.
Referring to FIGS. 3A and 3B, the exposed via hole portions 45a and 45b (see FIGS. 2A and 2B) of the organic passivation film 45 are developed and removed to form an organic passivation film pattern 45c. As shown in FIG. 3A, the data wiring 44 below the removed via hole portion 45a is dry-etched using the organic passivation film pattern 45c as an etch mask. During this etching process, the data wiring 44 is side-etched and an undercut xe2x80x9cAxe2x80x9d is formed beneath the organic passivation film pattern 45c. Further, the gate insulating film 42 placed below the removed via hole portions 45b and is dry-etched using the organic passivation film pattern 45c as an etch mask to form the second via hole 47 for exposing the gate wiring 42. During this etching process, the inorganic insulating film is side-etched and thereby an undercut xe2x80x9cAxe2x80x9d is generated beneath the organic passivation film pattern 45c. 
Likewise, in the case that the data wiring 44 is formed of a material having a high consumptive rate, such as molybdenum (Mo) or MoW, the data wiring 44 is side-etched at an edge of the first via hole 46 and thus the undercut xe2x80x9cAxe2x80x9d is generated beneath the organic passivation film pattern 45c. At the same time, the data wiring 44 is consumed by a predetermined thickness at the bottom xe2x80x9cBxe2x80x9d of the first via hole 46.
Referring to FIGS. 4A and 4B, after depositing a reflection metal film such as aluminum (Al) on the organic passivation film pattern 45c in which the first and second via holes 46 and 47 are formed, the deposited reflection metal film is patterned by a photolithography process to form the pixel electrode 48, which is connected to the data wiring 44 through the first via hole 46, and the pad electrode 49, which is connected to the gate wiring 42 through the second via hole 47.
At this time, due to the undercut that is formed beneath the organic passivation film pattern 45c, a failure in the coverage of the reflection metal film is generated and thereby an opening failure of the reflection metal film occurs at the bottom of the first and second via holes 46 and 47.
Accordingly, it is inevitably required to resolve this undercut problem. If the undercut problem is not resolved, it is difficult to use the passivation film as a single layer of organic insulating film and thus it becomes impossible to decrease the number of photomask layers that are needed.
Accordingly, to address the foregoing difficulties, it is a first object of the invention to provide a TFT for an LCD capable of decreasing the number of photomasks needed by forming the passivation film as a single layer.
It is a second object of the invention to provide a method of manufacturing a TFT for a LCD capable of decreasing the number of photomasks needed by forming the passivation film as a single layer.
It is a third object of the invention to provide a method of manufacturing a TFT for a reflection and transmission type LCD capable of enhancing a boundary characteristic between the reflection electrode and the transparent electrode by forming the passivation film as a single layer and using IZO (indium-zinc-oxide) as the transparent electrode.
To accomplish the first object of the invention, there is provided a TFT for a LCD. The TFT includes a gate wiring formed on a substrate including a display region and a pad region positioned outside the display region and extending in a first direction. A gate insulating film is formed on the gate wiring and the substrate to partially expose the gate wiring. An active pattern is formed on the gate insulating film. A data wiring is partially overlapped with the active pattern, and is formed on the gate insulating film and extends in a second direction perpendicular to the first direction. An organic passivation film pattern is formed on the data wiring and the gate insulating film. The organic passivation film pattern includes a first via hole for partially exposing the data wiring and a second via hole for exposing the partially exposed gate wiring. A pixel electrode is formed on the organic passivation film pattern and is connected to the data wiring through the first via hole on the data wiring. A pad electrode is formed on the organic passivation film pattern and is connected to the gate wiring through the second via hole. The gate insulating film is protruded inwardly relative to the organic passivation film pattern at a bottom edge of the second via hole.
To accomplish the second object of the invention, there is provided a method for manufacturing a TFT for a LCD. In the above method, gate wiring is formed to extend in a first direction on a substrate including a display region and a pad region positioned at an outer portion of the display region. A data wiring is formed to extend in a second direction perpendicular to the first direction on the gate wiring with a gate insulating film interposed between the gate wiring and the data wiring. An organic passivation film is formed on the data wiring and the gate insulating film. The organic passivation film is patterned such that the slope of the organic passivation film decreases as it travels to an edge where a via hole is being formed, to form an organic passivation film pattern. The gate insulating film is etched by using the organic passivation film pattern as a mask to form a first via hole for exposing the data wiring and a second via hole for exposing the gate wiring. An undercut placed beneath the organic passivation film pattern is removed. A pixel electrode is formed to be connected to the data wiring through the first via hole and a pad electrode is formed connected to the gate wiring through the second via hole on the organic passivation film pattern.
To accomplish the third object of the invention, there is provided a method for manufacturing a TFT for a LCD. In the above method, gate wiring is formed to extend in a first direction on a substrate including a display region and a pad region placed at an outer portion of the display region. The gate wiring includes a gate line having a gate electrode formed within the display region and a gate pad formed at the pad region and connected to an end of the gate line. A gate insulating film is formed on the gate wiring and the substrate. An active pattern is formed on the gate insulating film. A data wiring is formed to extend in a second direction perpendicular to the first direction on the gate insulating film. The data wiring includes a first electrode overlapped with a first region of the active pattern and a second electrode overlapped with a second region facing the first region. An organic passivation film is formed on the data wiring and the gate insulating film. The organic passivation film is patterned such that the slope of the organic passivation film decreases as it travels to an edge of a portion where a via hole is being formed, to form an organic passivation film pattern. The gate insulating film is etched by using the organic passivation film pattern as a mask, to form a first via hole for exposing the first electrode and a second via hole for exposing the gate pad. An undercut beneath the organic passivation film pattern is removed. A pixel electrode is formed to be connected to the first electrode through the first via hole and a pad electrode is formed to be connected to the gate pad through the second via hole on the organic passivation film pattern.
To accomplish the third object of the invention, there is provided a method for manufacturing a TFT for a reflection and transmission type LCD. In the above method, a gate wiring is formed to extend in a first direction on a substrate including a display region and a pad region placed outside the display region. A data wiring is formed to extend in a second direction perpendicular to the first direction on the gate insulating film with a gate insulating film interposed between the gate wiring and the data wiring. A passivation film is formed on the data wiring and the gate insulating film. The passivation film has a first via hole for exposing the data wiring and a second via hole for exposing the gate wiring. A transparent electrode layer made of IZO and a reflection electrode layer are deposited in the order named on the first and second via holes and the passivation film. A photoresist pattern is formed on the reflection electrode layer such that the photoresist pattern remains thicker in the reflection region than in the transmission region. The reflection electrode layer and the transparent electrode layer are wet-etched at the same time using the photoresist pattern as a mask. The photoresist pattern is removed by a predetermined thickness such that the reflection electrode layer of the transmission region is exposed. The reflection electrode layer of the transmission region is removed by a dry-etch. The photoresist pattern is removed to form a transparent electrode and a reflection electrode enclosing the transparent electrode.
According to the first embodiment of the present invention, a passivation film made of an organic insulating film is once exposed using a photomask having a partial exposure pattern formed in a slit structure, or made of semi-transparent material at an edge portion of a via hole, to form an organic passivation film pattern such that the slope of the organic passivation film decreases as it travels to an edge where the via hole is being formed. Afterwards, a dry-etch process is performed by using the organic passivation film pattern as an etch mask to form the via hole. Then, in order to remove the organic passivation film pattern, an ashing or plasma dry-etch is performed to remove the undercut beneath the organic passivation film pattern. Thus, as the undercut is removed, a lower film of the organic passivation film pattern is protruded from a bottom edge of the via hole. Therefore, there does not occur a deposition failure in which a metal film deposited during a subsequent process is opened at a stepped portion.
Preferably, if the partial exposure pattern is further formed at a position corresponding to the reflection plate of the pixel region in the photomask, the via hole can be formed by an exposure process using a single photomask and at the same time an irregular surface having a plurality of concave portions and convex portions can be formed. Therefore, in a reflection and transmission composite type LCD or a reflection type LCD, it is possible to reduce the number of photomasks needed from seven sheets to five sheets.
According to the second embodiment of the present invention, an organic passivation film pattern is left at an edge of a via hole region by performing the exposure process twice in succession using two photomasks. Afterwards, the via hole is formed using the organic passivation film pattern and an ashing or plasma dry-etch process is performed to remove the undercut formed beneath the organic passivation film pattern. Therefore, a failure in which a metal film for a pixel electrode is opened at a stepped portion due to a height difference is prevented.
Here, since either one of the two photomasks can be used as an exposure mask for forming an irregular surface in the organic passivation film, in a reflection and transmission composite type LCD or a reflection type LCD, it is possible to reduce the number of photomasks needed from seven sheets to six sheets.
According to the third embodiment of the present invention, since a transparent electrode in a reflection and transmission composite type LCD is formed of IZO instead of ITO, a boundary characteristic between the transparent electrode and the reflection electrode is enhanced and the manufacturing process is simplified. Also, since a passivation film is made of a single layer of an organic insulating film and one end of the transparent electrode is overlapped with a gate wiring and a data wiring such that a reflection electrode is left around the overlapped region, a high aperture ratio for a sufficient light transmission is obtained.